Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities.

Design and development of Design Verification methodology infrastructure for system in packages (SiPs) for high-performance AI/ML engines. This role requires a high degree of ownership, a strong technical background and a problem-solver mindset. In this role, you will be ensuring the success of integration of multiple chiplets and ensure functionality and performance of the system.

This role is Hybrid, based out of Santa Clara, CA. 

 

Responsibilities:

  • Verification of Tenstorrent's digital IP and SOC logic at chiplet integration level, using a predominantly UVM  based  verification methodologies.
  • Build verification infrastructure to support multiple DUTs including maximally automated model builds and simulation/regression runs 
  • Create verification components including but not limited to creating  testbenches, checkers and monitors, and test generators.
  • Drive assertions and coverage gathering methodologies
  • Strong focus on understanding hardware and software interface (HSI)
  • Own and develop test plans and implement test suites.
  • Publish/review  verification metrics and drive convergence towards tape-out.
  • Cross-functional work with Architects, Software and Design/Emulation teams
  • Guide and mentor junior engineers

Experience & Qualifications:

  • BS/MS/PhD in EE/ECE/CE/CS with 10+ years of experience in  ASICs or SoC teams
  • Expert understanding of logic design and verification
  • Expertise in verilog/systemVerilog/C++/systemC, 
  • Expertise in verification tools, flows and flows, scripting and automation
  • Strong problem solving skills
  • Excellent organizational and communication skills, oral and written.

 

Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made.

Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer.

Due to U.S. Export Control laws and regulations, Tenstorrent is required to ensure compliance with licensing regulations when transferring technology to nationals of certain countries that have been licensing conditions set  by the U.S. government.

Our engineering positions and certain engineering support positions require access to information, systems, or technologies that are subject to U.S. Export Control laws and regulations, please note that citizenship/permanent residency, asylee and refugee information and/or documentation will be required and considered as Tenstorrent moves through the employment process.

If a U.S. export license is required, employment will not begin until a license with acceptable conditions is granted by the U.S. government.  If a U.S. export license with acceptable conditions is not granted by the U.S. government, then the offer of employment will be rescinded.

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