Sr. Digital ASIC/FPGA Validation Engineer (Starlink)
Redmond, WA, United States
SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars.
SR. DIGITAL ASIC/FPGA VALIDATION ENGINEER (STARLINK)
As a member of our multifaceted ASIC team, you will have the rare and phenomenal opportunity to craft upcoming SOCs that will enable our Starlink chips. These chips help connect, enable, and empower humanity every single day with performance that far surpasses that of traditional satellite internet and ground infrastructure limitations. Starlink delivers high-speed, low latency broadband internet to locations where access has been unreliable, expensive, or completely unavailable.
In this critical role, you will be actively working on validating SoCs starting from the point when the first samples arrive from the fab. You will be performing initial bring-up of the SoC, testing core functionality, characterizing electrical and power utilization and paving the path for other teams, such as flight software, to cleanly integrate the SoC into the overall Starlink system. As part of these efforts, you will be working with a variety of high-speed interfaces, both industry standard and proprietary. You will also be responsible for developing and maintaining software that is needed for these validation efforts.
Design and build unique and technically challenging automated measurement systems, including both hardware and software design
Propose and develop a longer-term software architecture for automated test infrastructure, encompassing instrument control, data capture, data analysis and data organization
Develop hardware systems, PCBs and digital FPGA or microcontroller control solutions for the test systems
Work closely with the FPGA/ASIC design team and flight software team to add/improve testability and define various test infrastructure logic to ensure adequate silicon test coverage
Work closely with electrical design team to review signal integrity, power integrity and radiated/conducted emissions concerns as well as propose design changes or operational workarounds
Evaluate new IP from internal and external IP providers and test for logical and electrical compatibility with existing chips and FPGAs
Write software routines (Python, C/C++) to bring up and validate the SerDes while working with the software cross functional team members to help integrate SerDes drivers in the software track
Bachelor’s degree in electrical engineering, computer engineering or computer science
5+ years of experience validating ASICs and/or FPGAs
PREFERRED SKILLS AND EXPERIENCE:
Experience working with various high-speed SerDes architectures (NRZ, PAM4) and various clocking modes
Working experience with Ethernet, PCIe and other high-speed protocol layers
Ability to study and analyze internal and external team’s test results and provide interpretations to help drive IP selections and discussions
Experience writing comprehensive test reports covering test boundary conditions and test results
Strong debugging and problem-solving skills
Strong object-oriented programming skills
Strong communication skills and ability to work well within a fast-paced team
Experience with serial digital communication protocols such as SPI, I2C, JTAG and/or the software/hardware solutions to exercise these
Experience with microcontrollers, FPGAs, and/or basic digital signal processing concepts
Experience developing multi-threaded applications and systems
Experience with both Windows and Linux system usage/administration
To conform to U.S. Government space technology export regulations, including the International Traffic in Arms Regulations (ITAR) you must be a U.S. citizen, lawful permanent resident of the U.S., protected individual as defined by 8 U.S.C. 1324b(a)(3), or eligible to obtain the required authorizations from the U.S. Department of State. Learn more about the ITAR here.
SpaceX is an Equal Opportunity Employer; employment with SpaceX is governed on the basis of merit, competence and qualifications and will not be influenced in any manner by race, color, religion, gender, national origin/ethnicity, veteran status, disability status, age, sexual orientation, gender identity, marital status, mental or physical disability or any other legally protected status.
Applicants wishing to view a copy of SpaceX’s Affirmative Action Plan for veterans and individuals with disabilities, or applicants requiring reasonable accommodation to the application/interview process should notify the Human Resources Department at (310) 363-6000.