As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data-intensive applications in the world. SiFive’s unrivaled compute platforms have enabled leading technology companies around the world to innovate, optimize, and deliver the most advanced solutions of tomorrow across every market segment of chip design, including artificial intelligence, machine learning, automotive, datacenter, mobile, and consumer. With SiFive, the future of RISC-V has no limits.
As a Release RTL/Embedded QA Engineer, you will be joining the Release Management team working with senior operation engineers and engineering teams to qualify customer SiFive CoreIP products before delivering customers. You will participate in the implementation and execution of the Operations strategy to build, enhance and support all release operations. RISC-V is highly configurable, by its design philosophy. Your role is to help our Operation Engineers to create a design pipeline, with various combinations of supported instruction sets and with various peripherals and bus interconnect architectures. This is a perfect role for an entry level or junior RTL design/embedded engineer looking to grow their career towards RSIC-V CPU design/verification/software roles.
* Running QA checks on release deliverables to ensure customers have a great out of box experience
* Communicate directly with Field Application Engineers/Engineering teams regarding any failures, discrepancies with benchmark scores
* Participation implementing and executing release strategy
* Day to day support of release operations customers deliveries
* Working with release operation engineers and engineering teams to ensure customer requirements are met and delivered
Writing new test cases in bare metal environment using Assembler and C
* BS/BE in Electrical Engineering or Computer Science, min 1-2 years of proven experiences
* Understanding of CPU IP such as RISC-V, ARM, MIPS, and ASIC Design Flow
* Understanding of Linux command lines and writing scripts for automation
* Understanding of embedded software and development tools
* Willingness to continue learning and growing in a professional environment is a must
* Good verbal and written communication skills
* Ability to perform effectively in a demanding environment and demanding workloads
* Familiarity of Git, JIRA, RTL simulators like Verilator, VCS, and FPGA flashing tools