Lightmatter is leading the revolution in AI data center infrastructure, enabling the next giant leaps in human progress. The company invented the world’s first 3D-stacked photonics engine, Passage™, capable of connecting thousands to millions of processors at the speed of light in extreme-scale data centers for the most advanced AI and HPC workloads.
Lightmatter raised $400 million in its Series D round, reaching a valuation of $4.4 billion. We will continue to accelerate the development of data center photonics and grow every department at Lightmatter!
If you're passionate about tackling complex challenges, making an impact, and being an expert in your craft, join our team of brilliant scientists, engineers, and accomplished industry leaders.
Lightmatter is (re)inventing the future of computing with light!
About this role
We are hiring a Physical Design Engineer to help drive backend digital execution for some of the leading photonics based interconnect solutions. You will work alongside a team of world-class scientists and engineers in defining how the system will be optimized and trailblaze problems that are new to the industry. If your passion is innovation, solving challenging technical problems and doing impactful work you should join our team.
In this job you will be responsible for physical design, leading edge CMOS technologies and flows.This includes synthesis through place and route, timing closure, and tapeout signoff.
Responsibilities
- Implement digital blocks from synthesis through routing, using industry standard tools and flows
- Define and clean up timing constraints across different timing modes. Review signoff STA reports and fix timing violations for all timing scenarios
- Build and customize power grid and ensure power integrity goals are met
- Understand clock details and be able to customize clock implementation for functional and test clocks
- Debug and clean up DRC/LVS
- Functional and timing ECO implementation
- Be willing to do manual layouts as well as willingness to learn and do silicon photonics layout
- Work with EDA companies to resolve any tool issues
- Write TCL, Python, or Shell scripts to automate flow or customize existing flows
Qualifications
- Bachelor’s in Electrical Engineering or Computer Engineering
- At least 8+ years of industry experience working as a Physical Design Engineer
- Minimum of three years of custom layout experience
- Experience in TCL and Python (or other scripting languages)
- Knowledge of Basic SoC Architecture and HDL languages like System Verilog to collaborate with RTL designers
- Must have completed blocks or top level physical design for large ASICs or mixed signal chips that taped out
- Strong teamwork skills with the ability to collaborate with multiple functional teams across a variety of fields
- Ability to react to change and thrive in a fast paced environment
Preferred Qualifications
- Master’s in Electrical Engineering or Computer Engineering with 6+ years of experience or Phd with 3+ years of experience
- Custom layout using Virtuoso
We offer competitive compensation. The base salary range for this role determined based on location, experience, educational background, and market data.
Benefits
- Comprehensive Health Care Plan (Medical, Dental & Vision)
- Retirement Savings Matching Program
- Life Insurance (Basic, Voluntary & AD&D)
- Generous Time Off (Vacation, Sick & Public Holidays)
- Paid Family Leave
- Short Term & Long Term Disability
- Training & Development
- Commuter Benefits
- Flexible, hybrid workplace model
- Stock Option Plan
Lightmatter recruits, employs, trains, compensates, and promotes regardless of race, religion, color, national origin, sex, disability, age, veteran status, and other protected status as required by applicable law.
