HPR is the leading provider of high-performance and ultra-low latency electronic trading and capital markets infrastructure solutions offered as a managed service. Our cutting-edge technology is used by tier-1 financial institutions to monitor and execute trades rapidly and efficiently. As we continue to innovate and grow, we’re searching for a forward-thinking SeniorFPGA Design and Verification Engineer to help us build the future of capital markets infrastructure.
As a Senior FPGA Design and Verification Engineer you will:
Design and implement high-performance FPGA compute and networking systems used in electronic trading
Develop testbenches and execute verification plans to ensure design correctness
Collaborate with cross-functional teams to solve novel technical problems at the intersection of hardware and software
Be a key contributor to our process and team culture, continually iterating on how we build products, not just on what we build
Required Qualifications
BS/MS in Computer Engineering, Electrical Engineering, Computer Science, or related
5+ years of relevant experience in digital logic design and/or verification for FPGAs or ASICs
Experience writing RTL and/or testbenches in SystemVerilog (preferred) or VHDL
Proficiency working in a Linux environment
Excellent interpersonal, verbal, and written communication skills
Desired Qualifications
Experience working with Xilinx and/or Altera FPGAs
Familiarity with FPGA architecture and design techniques, including optimizations for synthesis and timing closure
Experience with advanced verification methodologies (constrained random testbenches, functional coverage, assertions, formal, UVM, etc.)
Experience with industry standard simulation and design tools (VCS, Vivado, Quartus)
In-depth knowledge of networking protocols (IP, TCP, UDP)
Experience with high-speed interfaces (PCIe, Ethernet, DDR)
Familiarity with programming in C and Python
Please note: HPR currently does not provide employment sponsorship