DRW is a technology-driven, diversified principal trading firm. We trade our own capital at our own risk, across a broad range of asset classes, instruments and strategies, in financial markets around the world. As the markets have evolved over the past 25 years, so has DRW – maximizing opportunities to include real estate, cryptoassets and venture capital. With over 1000 employees at our Chicago headquarters and offices around the world, we work together to solve complex problems, challenge consensus and deliver meaningful results. It’s a place of high expectations, deep curiosity and thoughtful collaboration.

Our team is currently looking for a FPGA Verification Specialist. You must be comfortable working within a fast-paced environment. You must possess a keen sense of enthusiasm and attention to detail, as well as a sense of commitment and dedication to our team.

You’ll feel right at home if you have:

  • Proficient in coding with SystemVerilog and Python
  • Have a minimum of 2 years of relevant experience in ASIC/FPGA Verification
  • Demonstrable knowledge of ASIC/FPGA verification with Modelsim and Questa
  • Experience with verification test-case design and testing bench RTL coding
  • Experience with python scripting for tools and verification framework automation
  • Experience with Linux OS and Networking protocol (Ethernet among others)
  • Familiar with functional coverage and code coverage
  • Experience with identifying bugs in architecture, functionality and performance with strong overall debug skillset
  • Excellent written and oral communication skills in English, including the ability to produce clear, concise documentation.
  • A highly motivated self-starter, able to work independently and take full ownership of his/her task and project.
  • Possesses excellent comprehension, communication, and interpersonal skills
  • Enjoys working in a fast-paced, multi-project team environment

 

Bonus Skills:

  • Experience with software/RTL co-simulation environments such as cocotb is a plus
  • Experience with SystemVerilog Assertions is a plus
  • Experience with task/bug tracking tools such as JIRA/Wrike is a plus
  • Experience with Formal Verification is a plus.
  • Experience with UVM is a plus

 

What you’ll be working on:

  • All aspects of individual block-level and full project level verification including framework/environment development, test plan development and execution, code/functional coverage closure and reviews.
  • Build out RTL and software co-simulation environments
  • Create new verification tests for new product and integrated into the current continuous integration (CI) framework
  • Supporting regression runs
  • Verification framework and structure optimization
  • Verification testing automation
  • Participate in verification project requirement gathering, project planning and test-bench implementation
  • Debug the verification test case and framework using SystemVerilog and Python.
  • Setup the lab onboard testing/verification environment
  • Build and maintain tools and processes associated with FPGA verification.
  • Collaborate with a team of FPGA Designers on FPGA project verification.

What DRW Montreal has to offer you:

  • Recognized as one of Canada’s Best Employers for the past 8 years
  • Committed to continuous learning & development
  • Industry leading benefits package and perks
  • Focused on employee well-being and work-life balance
  • Community initiatives, volunteer program and opportunities for giving back

Find out more about all of our perks & benefits here

For more information about DRW's processing activities and our use of job applicants' data, please view our Privacy Notice at https://drw.com/privacy-notice.

 

California residents, please review the California Privacy Notice for information about certain legal rights at https://drw.com/california-privacy-notice.

 

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