Didi Chuxing (“DiDi”) is the world’s leading mobile transportation platform. We’re committed to working with communities and partners to solve the world’s transportation, environmental, and employment challenges by using big data-driven deep-learning algorithms that optimize resource allocation.
Didi Chuxing’s Autonomous-Driving team was established in 2016, and has grown to a comprehensive research and development organization covering HD mapping, perception, behavior prediction, planning and control, infrastructure and simulation, labeling, hardware, mechanical, problem diagnosis, vehicle modifications, connected car, and security, among others. We’re developing and testing self-driving vehicles in China and the United States.
In August 2019, DiDi upgraded its autonomous driving unit to an independent company to focus on R&D, product application, and business development related to self-driving technologies. The new company will integrate the resources and technology of DiDi’s platform, continue to increase investment in R&D, and deepen collaboration with auto industry partners.
We are currently looking for a Senior FPGA Engineer to work on RTL design on FPGA platform to implement system functionalities for high performance hardware systems. Interfaces with various cross-functional teams such as software, firmware and hardware engineers to improve system performance and enable product deployment.
PRINCIPAL DUTIES AND RESPONSIBILITIES:
- Communicates with system engineers to understand system features and specifications
- Based on system requirement to select appropriate FPGA platform
- Implements system functionalities based the system requirements on FPGA platform
- Communicates with algorithm engineers to understand the algorithm and proposes implementation plan on FPGA
- Implements algorithm at RTL level on the FPGA platform
- Proposes verification and validation plan for RTL design
- Performs FPGA sub-system validation
- Collaborates with electrical engineers to design the FPGA related PCB
- Collaborates with other team member for system bring-up and validation
- Documents the design and validation of the RTL design
- Bachelor’s or Master’s degree in Engineering, Information Systems, Computer Science, or related field
- 3+ years FPGA development experience in related industry
- Knowledge and experience on RTL design with Verilog
- RTL implementation on FPGA platform (Xilinx or Altera/Intel)
- Knowledge and experience on synthesis, P&R, and timing analysis
- Experience on FPGA validation and testing
- 5+ years FPGA development experience in related industry
- Experience on digital signal processing implementation
- Experience with embedded FPGA with ARM core and AXI bus interface
- Experience with SoC integration
- Experience with ADC/DAC interfaces
- Knowledge on DDR memory interfaces
- Knowledge on Linux kernel development and device tree implementation