Astera Labs is a global leader in purpose-built connectivity solutions that unlock the full potential of cloud and AI infrastructure. Our Intelligent Connectivity Platform integrates PCIe, CXL and Ethernet semiconductor-based solutions based on a software-defined architecture that is both scalable and customizable. Inspired by trusted partnerships with hyperscalers and the data center ecosystem, we are an innovation leader of products that are flexible, interoperable, and reliable. We are headquartered in the heart of California’s Silicon Valley, with R&D centers and offices in Taiwan, China, Vancouver and Toronto, Canada, and Haifa, Israel. 

We are looking for a Emulation Engineer with experience with emulation and prototyping for complex ASICs. The ideal candidate would have strong software experience (scripting and/or C/C++) and be familiar with SOC architecture, and able to contribute to ASIC bringup, architectural validation, performance testing within the limits of the target platform, and driving SW architectural changes. Knowledge of communication protocols such as PCI-Express (Gen-3 and above), DDR, Ethernet, NVMe, or similar interfaces is a plus.

Basic qualifications:

  • Strong academic and technical background in computer/electrical engineering. At a minimum, a Bachelor’s in EE or Computer Science is required, and a Master’s is preferred.
  • ≥3 years’ experience supporting or developing complex SoC/silicon products for Server, Storage or Networking applications.
  • Experience working with logic designers to architect, specify, and verify hardware-software interfaces on complex SoCs.
  • Professional attitude with the ability to prioritize a dynamic list of multiple tasks and to work with minimal guidance and supervision. 
  • Entrepreneurial, open-mind behavior and can-do attitude. Think and act fast with the customer in mind!
  • Authorized to work in the US and start immediately.

Required experience:

  • Experience with emulation and prototyping technologies like Palladium/Zebu/Veloce or Protium/EP/HAPS.
  • Strong software skills in C/C++ for scalable and high performance emulation.
  • Experience with System Verilog.
  • Experience in programming and scripting languages (like python/perl).
  • Currently based locally or open to relocation.

Preferred experience:

  • Experience understanding software and hardware co-simulation approaches and debug methods.
  • Experience in modeling for emulation and prototyping.
  • Debugging SW/FW/bus protocols using emulation.
  • Experience with virtualization technologies for emulation like QEMU or Virtual Box.
  • Working knowledge of PCIe, Ethernet, DDR, SPI, I2C/I3C protocol.

The base salary range is $120,000.00 USD – $170,000.00 USD. Your base salary will be determined based on your location, experience, and the pay of employees in similar positions.  

We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.

Apply for this Job

* Required
resume chosen  
(File types: pdf, doc, docx, txt, rtf)
cover_letter chosen  
(File types: pdf, doc, docx, txt, rtf)
When autocomplete results are available use up and down arrows to review
+ Add another education


Our system has flagged this application as potentially being associated with bot traffic. Please turn off any VPNs, clear your browser cache and cookies, or try submitting your application in a different browser. If this issue persists, please reach out to our support team via our help center.
Please complete the reCAPTCHA above.