Astera Labs is a global leader delivering semiconductor-based connectivity solutions purpose-built to unleash the full potential of intelligent data infrastructure at cloud-scale. Our class-defining first-to-market products based on PCIe, CXL, and Ethernet technologies deliver critical connectivity for high-value artificial intelligence and machine learning applications. Our focus on customer-driven product definition and commitment to design solutions in the cloud, for the cloud, results in breakthrough execution and scale for our customers. We are headquartered in the heart of California’s Silicon Valley, with R&D centers and offices in Taiwan, China, Vancouver and Toronto, Canada, and Haifa, Israel.
As an Astera Labs Senior Systems Engineer, you will be developing and debugging Server Systems for validation and productization of future looking memory technologies for Astera Labs CXL solutions.
- Bachelors in Electrical Engineering / Electronics / Computer Science or related fields.
- 5+ years experience in a system validation role
- Strong C or Python/Perl development experience in Linux environments
- Strong experience in implementing Automation Infrastructure for regressions and CI/CD
- Experience with regression infrastructure and automation on HW platforms
- Good understanding of BIOS/PCIe device/OS interactions
- Good understanding of BIOS, BMC, I2C and x86_64 Server Management
- Basic understanding of DDR Memory, Memory Controllers
- Familiarity with PCIe/CXL technologies
- Familiarity with PyTest kind of frameworks
- Ability to build and upstream Linux kernel changes
We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.