Requisition ID: 112
Become a leader in building a safer future.
AEye is the premier provider of intelligent, next generation, adaptive LiDAR for advanced driver-assistance, vehicle autonomy, and industrial applications that save lives and propel the future of transportation and mobility. We are technology thought leaders who value innovation to create reliable products that save lives. The company's 4Sight™ Intelligent Sensing Platform focuses on what matters most: enabling faster, more accurate and reliable perception for dynamic applications ranging from autonomous driving to intelligent infrastructure, which require precise measurement imaging to ensure safety and performance. AEye was founded in 2013 and is based in the San Francisco Bay Area. We believe in a creative atmosphere, with open, collaborative idea-sharing, where all employees are empowered to achieve their potential. Come experience our flexible and collaborative work environment!
AEye is looking for a highly motivated FPGA Engineer. The individual will be expected to work with a dynamic, talented team of hardware, software and systems engineers developing state-of-the art Lidar technology and products. A wide breadth of previous experience and technical acumen will allow the candidate to participate collaboratively in all levels of the design process, from concept and architectural definition through detailed fpga algorithm implementation.
Essential Skills & Experience Requirements (required):
- BS in Electrical Engineering or Computer Engineering.
- Minimum of 3 years hands-on industry (non-academic/research) experience in FPGA design.
- Solid understanding of Digital design concepts, timing issues and clock domain crossing.
- Proficiency in Verilog, SystemVerilog and/or VHDL.
- Experience in using industry standard EDA tools such as Vivado or Quartus and Modelsim.
- Good communication & collaboration skills; able to produce quality documentation for both internal & external target audiences.
- Ability to work in a fast-paced and demanding start-up atmosphere.
Preferred Skills & Experience (Highly Desirable):
- Direct experience in designing with Xilinx Zynq devices and Vivado Design Suite. Experience in writing custom RTL and using Xilinx IP in designs.
- Proficient in creating module-level testbenches in Verilog/SystemVerilog and simulating designs in ModelSim or QuestaSim.
- Experience bringing up HW in the lab and debugging using Tcl or C test code. Participate in new HW bring up.
- Comfortable using Git or other similar version control systems.
- Prior experience in two or more of these functional areas:
- Xilinx Zynq platform and implementing DMA/VDMA engines; memory and peripheral subsystems (associated protocols)
- FPGA ARM Core & AXI Bus interfaces.
- JESD204B/C interface and IP.
- Experience in implementing math operations and filters in FPGAs.
Salary Range: $129,300 - $152,200
AEye, Inc. is proud to be an Equal Opportunity/Affirmative Action Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, ancestry, pregnancy, sexual orientation, gender identity, national origin, age, citizenship, marital status, disability or Veteran status.
AEye, Inc. participates in E-Verify.
To all recruitment agencies: AEye will not accept agency resumes for this role. Please do not forward resumes to our jobs alias, AEye employees or any other organization location. AEye is not responsible for any fees related to unsolicited resumes.