Achronix Semiconductor Corporation is a fabless semiconductor corporation based in Santa Clara, California, offering high-performance FPGA solutions. Achronix is the only supplier to have both high-performance and high-density standalone FPGAs and embedded FPGA (eFPGA) solutions in high-volume production. Achronix's FPGA and eFPGA IP offerings are further enhanced by ready-to-use PCIe accelerator cards targeting AI, ML, networking and data center applications. All of Achronix's products are supported by best-in-class EDA software tools.
The successful candidate will have a unique opportunity to collaborate directly with other Achronix research and development software team members working on synthesis, detailed routing, global routing, detailed placement, global placement, timing optimization, runtime analysis, and runtime and memory optimizations. Join our culture of agile innovation and continuous quality improvement.
Achronix engineers implement robust software solutions for placement, routing, or timing optimization of Speedster®7t large standalone FPGAs and Speedcore™ embedded FPGAs (eFPGAs), while leveraging unique features of the Achronix FPGA technology. Utilize your knowledge of algorithms and data structures in the context of a high-performance timing-driven FPGA placement and routing application, to make significant contributions to the ACE software tool chain.
- Programing and debugging skills in C++ or another high level programming language
- Proficient in software data structures and algorithms
- Strong analytical skills to understand cause and effect in a large software code base
- Ability and willingness to try novel approaches to solve difficult software engineering problems
- Scripting languages, especially Python, Tcl, Perl, and shell scripting
- Version control systems such as Perforce, Git, or Mercurial
- Use of one or more commercial or academic Electronic Design Automation tools
- Linux and Microsoft Windows operating systems, compilers, and IDEs
- Cross-platform development
- Software multi-threading techniques
- Digital design concepts and hardware description languages (HDLs) such as SystemVerilog, Verilog, or VHDL
- Digital circuits with prior experience in FPGA technologies
Education and Experience
- Junior or senior in Computer Science, Computer Engineering, Electrical Engineering, or other related/applied engineering degree from a top research university
The compensation range for this position is $30-$40 an hour. Hourly ranges dependent on experience and location.